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Vyoma Systems

Category: AI Developer Tools

An AI-powered, cloud-native verification platform designed to accelerate the development and functional verification of RISC-V based processors and SoCs. Vyoma Systems was founded in 2021. The company is led by Lavanya Jagadeeswaran. Based in Chennai, India. Team size: 1-10. Total funding raised: Undisclosed. Latest round: Seed. Key investors include ["IITM Pravartak Technologies Foundation","Ministry of Electronics and Information Technology (MeitY)"].

Founded
2021
Headquarters
Chennai, India
Team size
1-10
Total funding
Undisclosed

Value proposition

Reduces verification cycle time and improves pre-silicon quality and security by providing a ready-to-deploy, Python-powered verification environment that lowers the barrier to entry for complex hardware testing.

Products and solutions

["UpTickPro (Flagship SaaS Verification Platform)","RISC-V Verification IPs (supporting RV32/64 architectures)","Cloud-based Emulation Environments","RISC-V Software Stack Solutions"]

Unique value

Pioneered the 'RISC-V Ecosystem-as-a-Service' model, utilizing Python-based verification (CoCoTb) which allows software engineers to participate in hardware verification, traditionally a hardware-only domain.

Target customer

Semiconductor design houses, RISC-V IP providers, SoC developers, and academic research institutions.

Industries served

["Semiconductors","Electronic Design Automation (EDA)","Internet of Things (IoT)","Artificial Intelligence (Edge AI)"]

Technology advantage

Leverages AI for automated test generation and coverage analysis, combined with a cloud-native architecture that eliminates the need for expensive on-premise EDA infrastructure.

How they differentiate

Utilizes a 'Software-Defined Hardware Verification' approach using Python-based CoCoTb and AI-driven automation, allowing software engineers to perform hardware verification without deep SystemVerilog expertise.

Main competitors

["Imperas Software (Synopsys)","Breker Verification Systems","Axiomise","Codasip"]

Key partnerships

["IIT Madras (SHAKTI Processor Project)","RISC-V International (CEO serves as a Global Ambassador)","IITM Pravartak Technologies Foundation (Incubation & Funding)","NIELIT Calicut (Technical Facilitation & Hackathons)"]

Notable customers

["SHAKTI Processor Project","IIT Madras","InCore Semiconductors (Collaborator)"]

Major milestones

["Successfully verified SHAKTI, India's first indigenous RISC-V processor","Founder Lavanya Jagadeeswaran appointed as RISC-V International Ambassador for India","Launched UpTickPro, an AI-powered cloud-native verification platform","Selected for the MeitY Design Linked Incentive (DLI) scheme for semiconductor design"]

Growth metrics

Incubated at IITM; transitioned from academic research (SHAKTI project) to a commercial SaaS model with the UpTickPro platform.

Market positioning

Early-stage deep-tech disruptor in the RISC-V Electronic Design Automation (EDA) space.

Geographic focus

India, North America, and Europe (Global RISC-V ecosystem)

Patents and IP

At least one published patent related to semiconductor verification methodologies (as per YNOS/CB Insights records).

About Lavanya Jagadeeswaran

Lavanya Jagadeeswaran has over 18 years of expertise in semiconductor verification. Before founding Vyoma Systems, she was a Senior Project Officer at IIT Madras, where she led the verification of the SHAKTI processor, India's first indigenous RISC-V CPU. Her corporate career includes significant roles at global semiconductor leaders: Staff Engineer at Rambus, Senior Verification Engineer at ARM, and Verification Engineer at IBM.

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