Celero raises $275M to push coherent optical DSP into AI data centers
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New 2024 optical-DSP entrant with validated 2nm coherent silicon and a $275M Series C meaningfully updates the AI infra player map; silicon design is the primary subject, while the round is under the $500M capital-tag threshold.
Celero raises $275M to push coherent optical DSP into AI data centers
Irvine, California-based Celero Communications closed a $275 million Series C on September 8, 2026, led by Atreides Management, Valor Equity Partners, and CapitalG. The round lifts cumulative funding to $415 million and values the company above $3 billion. Celero also said it has validated 2-nanometer coherent digital signal processor (DSP) silicon as the technical base for a 1.6T-to-3.2T AI optical interconnect roadmap. Proceeds are earmarked for R&D, product development, and production readiness. Existing investors Sutter Hill Ventures and Maverick Silicon participated. Co-founder and CEO Nariman Yousefi spent 17 years at Broadcom, including as senior vice president and general manager of enterprise networking.
As AI training and inference clusters scale, link counts, port density, and cross-rack distances rise together. Accelerators waiting on network transfers leave expensive compute idle while power, cooling, and fiber costs climb. Capital is treating optical interconnects—not only more accelerators—as an early binding constraint on cluster economics. Celero’s commercial thesis is to move coherent DSP, long used in high-capacity long-haul links, into shorter-reach, denser, power- and cost-sensitive AI data centers as PAM4 faces pressure at higher rates. The raise buys commercialization time for a company founded in 2024; it does not equal production capacity, customer orders, or shipping revenue.
Builders and investors should keep three gates distinct: silicon validation, production readiness, and volume shipment. Celero has cleared the first and is funding the second. Coverage cited in the source says production has not started, no customers are disclosed, and a 2027 production target remains a goal rather than a locked date. Comparable bit-error-rate, reach, power, latency, packaging, and interoperability data—plus first customer qualifications—will decide whether coherent DSP clears the scale commercialization bar inside AI fabrics.