MemryX targets 10-fold performance gain with MX3+ edge AI accelerator
The AMW Read
The planned accelerator updates the edge inference hardware market, but its performance targets remain unverified.
MemryX targets 10-fold performance gain with MX3+ edge AI accelerator
MemryX has announced MX3+, an inference accelerator designed to deliver up to 10 times the peak AI compute performance and about 10 times the on-chip memory of its current MX3 chip. The company aims to retain the same low-power operating range and silicon footprint. These figures are design targets, not measured results. MemryX plans engineering samples in late 2027 and volume production in mid-2028.
The announcement adds a new product target to the market for specialized inference hardware. MemryX is addressing a central edge-computing constraint: running larger models and higher-resolution inputs within limits on power and physical space. Its planned architecture combines on-chip memory with processing near that memory to reduce data movement. The company also intends to connect up to 16 chips as one logical device, with a target of more than one peta-operation per second and 2.16 GB of distributed on-chip memory.
For hardware builders and investors, the key test is whether the eventual system can achieve these targets while maintaining low latency and the stated power and footprint constraints. MemryX says its compiler will distribute neural networks across available accelerators without manual model partitioning. It is accepting early-access applications from selected strategic partners and large enterprise customers to validate preproduction hardware and software.