FuriosaAI (퓨리오사AI) and Broadcom are co-developing a next-generation AI accelerator built on a 2nm pr...
The AMW Read
Updates the AI infrastructure player map with a new partnership structure (inference boutique + networking hyperscaler) that could reshape competitive dynamics; significance at segment level because it challenges NVIDIA's inference silicon dominance.
FuriosaAI (퓨리오사AI) and Broadcom are co-developing a next-generation AI accelerator built on a 2nm process, with sampling targeted for the first half of 2028. The chip will integrate FuriosaAI's proprietary Tensor Contraction Processor (TCP) architecture into a multi-die chiplet system, combined with Broadcom's AI networking and high-bandwidth Ethernet switch technology. The third-generation accelerator will use HBM4/4E memory. The partnership builds on FuriosaAI's second-generation RNGD (Renegade) accelerator — a 180W PCIe card built on TSMC 5nm with SK Hynix HBM3 — which has already been validated by Samsung SDS and LG AI Research.
Why it matters: This partnership exemplifies the hyperscaler-distribution moat pattern in the AI silicon substrate. FuriosaAI is not a foundry or a networking giant — it is an inference-architecture boutique (the TCP design) that needs Broadcom's hyperscale deployment infrastructure, networking ASICs, and deep ties to cloud builders to escape the vendor-lock death zone that has killed many AI chip startups. Broadcom, meanwhile, gains a differentiated inference silicon partner to counterbalance its existing ASIC relationships. The 2nm timeline (2028 sampling) places this squarely in the post-Hopper, post-Blackwell era, meaning FuriosaAI is betting that inference-power efficiency — not just raw matrix math — will determine the next capital-cycle winner.
Expert take: FuriosaAI's CEO Baek Jun-ho (백준호) made a pointed claim: that the combined TCP architecture and Broadcom infrastructure will deliver industry-best performance-per-watt for hyper-scale agentic AI environments. Broadcom's Charlie Kawwas reinforced that inference performance is now driven by data reuse and communication efficiency across servers and racks, not just compute flops. This signals a structural shift: the scaling-law economics of inference are migrating from single-chip TOPS to rack-level networking efficiency, an advantage Broadcom is engineering directly into FuriosaAI's chiplet architecture. If the 2nm HBM4E accelerator hits its targets, FuriosaAI could become a credible third force in inference silicon alongside NVIDIA and AMD — but only if Broadcom's distribution muscle reaches the largest cloud tenants.
